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| TP5322 TP5322 Initial Release P-Channel Enhancement-Mode Vertical DMOS FET Features ! ! ! ! ! ! ! ! Low threshold, -2.4V max. High input impedance Low input capacitance, 110pFmax. Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Complementary N- and P-channel devices General Description These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Application ! ! ! ! ! ! Logic level interfaces-ideal for TTL and CMOS Battery operated systems Photo voltaic devices Analog switches General purpose line drivers Telecom switches Package Options D D Absolute Maximum Ratings Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature**** ****Distance of 1.6mm from case for 10 seconds. BVDSS BVDGS 20V -55C to +150C 300C G D S G S TO-243AA (SOT-89)* TO-236AB (SOT-23)* * "Green" Certified Package Product Marking for SOT-89 Ordering Information Order Number / Package TO-243AA** TP5322N8 TP5322N8-G* TO-236AB*** TP5322K1 TP5322K1-G* BVDSS / BVDGS -220V -220V RDS(ON) (max) 12 12 VGS(th) (max) -2.4V -2.4V ID(ON) (min) -0.7A -0.7A TP3C Where =2-week alpha date code Product Marking for SOT-23 P3C Where =2-week alpha date code **Same as SOT-89. Product supplied on 2000 piece carrier tape reels. ***Same as SOT-23. Products supplied on 3000 piece carrier tape reels. A042005 1 Rev. 3 September 14, 2004 TP5322 Thermal Characteristics Package TO-243AA TO-236AB ID (continuous) -0.26A -0.12A ID (pulsed) -0.90A -0.70A Power Dissipation @ TA = 25C 1.6W 0.36W JC C/W 15 200 JA C/W 78** 350 IDR* -0.26A -0.12A IDRM -0.9A -0.7A *ID(continous) is limited by max rated Tj. **Mounted on FR4 board, 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substate. Electrical Characteristics (@25C unless otherwise specified) Symbol BVDSS VGS(th) VGS(th) IGSS IDSS ID(ON) RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current On-State Drain Current Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-Off Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time Min -220 -1.0 Typ Max -2.4 4.5 -100 -10 -1.0 -0.95 10 8.0 250 110 45 20 10 15 20 15 -1.8 300 15 12 1.7 Units V V mV/C nA A mA A %/C mmho pF ns Conditions VGS = 0V, ID = -2mA VGS = VDS, ID = -1mA VGS = VDS, ID = -1mA VGS = 20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating, TA = 125C VGS = -10V, VDS = -25V VGS = -4.5V, ID = -100mA VGS = -10V, ID = -200mA VGS = -10V, ID = -200mA VDS = -25V, ID = -200mA VGS = 0V, VDS = -25V f = 1MHz VDD = -25V, ID = -0.7A RGEN = 25 VGS = 0V, ISD = -0.5A VGS = 0V, ISD = -0.5A -0.7 100 V ns Notes: 1) All DC parameters 100% tested at 25C unless otherwise stated. (Pulsed test: 300s pulse at 2% duty cycle.) 2) All AC parameters sample tested. Switching Waveforms and Test Circuit 0V Input -10V t(ON) td(ON) 0V Output VDD RL VDD tr t(OFF) td(OFF) tf Input Pulse Generator RGEN D.U.T OUTPUT Doc.# DSFP-TP5322 A042005 2 Rev. 3 September 14, 2004 |
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